$(12$ points$)$ Consider the following Boolean functions:

F$1=$ A $$ C $+$ B$\text{'}$ C$\text{'}$

F$2=$ A$\text{'}$ B $+$ A $$ C $+$ A $$ B$\text{'}$ C

A$.$ Given one $3$:$8$ Decoder module and two logic gates, implement F$1$ and F$2$ in the $"$Q$2$A$"$ subcircuit.

B$.$ Given two $4$:$1$ Multiplexers and one NOT gate, implement F$1$ and F$2$ in the $"$Q$2$B$"$ subcircuit. $($Note: if you are using command$-$line verification, compare the outputs for the decoder$-$based and multiplexer$-$based implementations of these functions. Remember that F$2$ is the least significant bit shown in the output, and F$1$ is the most significant bit. If your implementations are correct, the outputs should match.$)$ Please provide a picture of the digital logic