(1) [3 Points) Harry Porter is preparing a Materials Requirement Plan (MRP) for a processor. The product structure tree is given below. You are asked to help Mr. Porter to understand the relationship among different items: to make each unit of the processor, how many units of capacitors are required? Processor LT = 1 week Processor Chip (5) LT = 2 Weeks Memory Chip (2) LT = 2 Weeks Circuit Card (4) LT = 3 Weeks Transistors (10) LT = 1 Week Capacitors (3) LT = 1 week = Harry Porter is preparing a Materials Requirement Plan (MRP) for a new. The product structure tree is given below. You are asked to help Mr. Porter to develop MRP plans for all product items by using the given information. Processor LT = 1 week Memory Chip Circuit Card Processor Chip (4) LT = 2 Weeks (2) (2) LT = 2 Weeks LT = 3 Weeks Transistors (18) LT = 1 Week Capacitors (3) LT = 1 week Notes: . LT: lead time Numbers in brackets indicate multiplicity, e.g., Circuit Card (2) means 2 circuit cards are needed to make each processor Product item Lot size On-Hand Allocated Safety Stock Lead time (weeks) 2 LFL 1,500+ 2,500+ 500 400 2,500 Processor Processor Chip Memory Chip Circuit Card Transistor Capacitor 1,200 200 6,500 1,100 5,000 350 No info needed 120,000 15,000 32,000 7,000 3 LFL 20,000+ 5,000 8,000 1 Note: In the following tables, leave a box blank if it's 0. [3 Points Table for Processor (LFL; LT=1) Week 1 2 3 4 5 6 7 8 2,000 4,500 Gross requirements Scheduled receipts Available Net requirements Planned order receipt Planned order releases 5 6 7 8 [5 Points] Table for Processor Chip (1,500+; LT=2) Week 2 3 4 Gross requirements Scheduled 400 receipts Available Net requirements Planned order receipt Planned order releases [5 Points) Table for Memory Chips (2,500+; LT=2) Week 1 2 3 4 5 6 7 8 Gross requirements Scheduled receipts Available 500 Net requirements Planned order receipt Planned order releases [7 Points Table for Transistors (LFL; LT=1) Week 1 2 3 4 5 6 7 8 Gross requirements Scheduled receipts Available 50,000 Net requirements Planned order receipt Planned order releases [7 Points Table for Capacitors (20,000+; LT=1) Week 1 2 3 4 5 6 7 8 Gross requirements Scheduled receipts Available 200 Net requirements Planned order receipt Planned order releases (1) [3 Points) Harry Porter is preparing a Materials Requirement Plan (MRP) for a processor. The product structure tree is given below. You are asked to help Mr. Porter to understand the relationship among different items: to make each unit of the processor, how many units of capacitors are required? Processor LT = 1 week Processor Chip (5) LT = 2 Weeks Memory Chip (2) LT = 2 Weeks Circuit Card (4) LT = 3 Weeks Transistors (10) LT = 1 Week Capacitors (3) LT = 1 week = Harry Porter is preparing a Materials Requirement Plan (MRP) for a new. The product structure tree is given below. You are asked to help Mr. Porter to develop MRP plans for all product items by using the given information. Processor LT = 1 week Memory Chip Circuit Card Processor Chip (4) LT = 2 Weeks (2) (2) LT = 2 Weeks LT = 3 Weeks Transistors (18) LT = 1 Week Capacitors (3) LT = 1 week Notes: . LT: lead time Numbers in brackets indicate multiplicity, e.g., Circuit Card (2) means 2 circuit cards are needed to make each processor Product item Lot size On-Hand Allocated Safety Stock Lead time (weeks) 2 LFL 1,500+ 2,500+ 500 400 2,500 Processor Processor Chip Memory Chip Circuit Card Transistor Capacitor 1,200 200 6,500 1,100 5,000 350 No info needed 120,000 15,000 32,000 7,000 3 LFL 20,000+ 5,000 8,000 1 Note: In the following tables, leave a box blank if it's 0. [3 Points Table for Processor (LFL; LT=1) Week 1 2 3 4 5 6 7 8 2,000 4,500 Gross requirements Scheduled receipts Available Net requirements Planned order receipt Planned order releases 5 6 7 8 [5 Points] Table for Processor Chip (1,500+; LT=2) Week 2 3 4 Gross requirements Scheduled 400 receipts Available Net requirements Planned order receipt Planned order releases [5 Points) Table for Memory Chips (2,500+; LT=2) Week 1 2 3 4 5 6 7 8 Gross requirements Scheduled receipts Available 500 Net requirements Planned order receipt Planned order releases [7 Points Table for Transistors (LFL; LT=1) Week 1 2 3 4 5 6 7 8 Gross requirements Scheduled receipts Available 50,000 Net requirements Planned order receipt Planned order releases [7 Points Table for Capacitors (20,000+; LT=1) Week 1 2 3 4 5 6 7 8 Gross requirements Scheduled receipts Available 200 Net requirements Planned order receipt Planned order releases