$14.$ a$)(3)$ What is the main advantage of a load$/$store architecture?

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b$)(3)$ What is the benefit for our pipelined system of writing registers in the first half of each clock cycle and reading registers in the second half of each clock cycle?

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c$)(3)$ An instruction is the next instruction following a lw instruction in our MIPS pipeline and requires the result written by the lw instruction as an input. Can this data hazard be eliminated by data forwarding?$$ Explain your answer.

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a$)(3)$ addiu$$ $$4,$ $$6,-13634$

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b$)(3)$ addiu$$ $$5,$ $$7,51902$

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c$)(3)$ div$$ $$8,$ $$9$