1. A __________________________ protocol is a technique that guarantees that multiple CPU's will access the same value of memory and not two different values.

2. A ___________________________ is a cache protocol used in shared memory machines that allows each cache to actively monitor a shared bus and maintain the correct value of a data value in it's own cache.

3. ____________________________ is the acronym that refers to a machine that issues a signal instruction, but has multiple ALUs that execute the instruction on different data streams.

4. _____________________________ is the basic cache policy used that allows a cache to save an updated value without having to write it back into memory.

5. A _____________________________ cache allows any address to be stored in any location in the cache.

6.T / F Amdahls law tells us that we will achieve a linear speedup with a corresponding increase in the number of transistors we can place on a chip.

7. T / F A fully associative cache may give worse results than a set associative cache.

8. T / F A forward unit can eliminate all data hazards.

9. T / F If a cache block is marked as exclusive within a cache, then we are guaranteed that the data value is different than the corresponding value in memory.

10. T / F The size of the cache is directly related to the size of the address issued from the program counter.