$1.$a$.$ Write down the following computational instructions Subtract R$6,$ R$4,$ R$7$

b$.$ Write down the implementation steps of the following instructions:

Load R$5,$ X$($R$7)$

$2.$ Consider the pipelined execution of the following sequence of instructions:

Add $R4,R3,R2$

AND $R7,R6,R5$

Subtract R$8,$ R$7,$ R$4$

Initially, registers R$2$ and R$3$ contain $4$ and $8,$ respectively. Registers R$5$ and R$6$ contain $128$ and $2,$ respectively. Assume that the pipeline provides forwarding paths to the ALU from registers RY and RZ in Figure $1$ above. The first instruction is fetched in cycle $1,$ and the remaining instructions are fetched in successive cycles.

Draw a diagram to show the pipelined execution of these instructions assuming that the processor uses operand forwarding.

$3.$ Write down $5$ stage implementation RISC processor.

$4.$ What will be the ideal memory hierarchy, it would be great to explain using a diagram.

$5.$ a$.$ What is memory mapping? What are the primary features and key differences of major memory mapping methods?

b$.$ Multiply the following pairs of signed $2\text{'}$s$-$complement numbers using the Booth algorithm. In each case, assume that $A$ is the multiplicand and $B$ is the multiplier.

$($i$)A=010111$ and $B=110110$

$($b$)A=110011$ and $B=101100$

$($c$)A=001111$ and $B=0011111.$a$.$ Write down the following computational instructions Subtract R$6,$ R$4,$ R$7$

b$.$ Write down the implementation steps of the following instructions:

Load R$5,$ X$($R$7)$

$2.$ Consider the pipelined execution of the following sequence of instructions:

Add $R4,R3,R2$

AND $R7,R6,R5$

Subtract R$8,$ R$7,$ R$4$

Initially, registers R$2$ and R$3$ contain $4$ and $8,$ respectively. Registers R$5$ and R$6$ contain $128$ and $2,$ respectively. Assume that the pipeline provides forwarding paths to the ALU from registers RY and RZ in Figure $1$ above. The first instruction is fetched in cycle $1,$ and the remaining instructions are fetched in successive cycles.

Draw a diagram to show the pipelined execution of these instructions assuming that the processor uses operand forwarding.

$3.$ Write down $5$ stage implementation RISC processor.

$4.$ What will be the ideal memory hierarchy, it would be great to explain using a diagram.

$5.$ a$.$ What is memory mapping? What are the primary features and key differences of major memory mapping methods?

b$.$ Multiply the following pairs of signed $2\text{'}$s$-$complement numbers using the Booth algorithm. In each case, assume that $A$ is the multiplicand and $B$ is the multiplier.

$($i$)A=010111$ and $B=110110$

$($b$)A=110011$ and $B=101100$

$($c$)A=001111$ and $B=001111$