$1.$ Analysis of a Computing System$$s Microarchitecture and Application Performance A control system uses a $3\mathrm{.}2$GHz processor to pre$-$process data. The algorithm used on the processor is double precision, floating point vector multiply$-$add, DAXPY and was compiled with full optimization $(-$O$3)$ and FMA disabled. As currently configured, the processor sustains a computation rate of $14\mathrm{.}03$ x $109$ DP FP Ops per second, and $4\mathrm{.}5$ DP FP Ops per cycle with code which uses the AVX$512$ SIMD feature. System users need to increase performance of the processor to $19\mathrm{.}2$ x $109$ DP FP Ops per second but must keep the clock frequency fixed at $3\mathrm{.}2$GHz$.$ Identify existing bottleneck$($s$)$ in the microarchitecture which limit performance, then describe and quantitatively justify the change$($s$)$ you would make to the microarchitecture which will enable the processor to achieve the desired sustained performance of $19\mathrm{.}2$ x $109$ DP FP Ops per second.