Question: 1. As shown below, Cortex-M supports up to 256 interrupts. What is the interrupt number of SysTick defined in CMSIS? System Exceptions -16 -1

1. As shown below, Cortex-M supports up to 256 interrupts. What is

the interrupt number of SysTick defined in CMSIS? System Exceptions -16 -1

0 Peripheral Interrupts interrupt number 239 2. What is the default interrupt

1. As shown below, Cortex-M supports up to 256 interrupts. What is the interrupt number of SysTick defined in CMSIS? System Exceptions -16 -1 0 Peripheral Interrupts interrupt number 239 2. What is the default interrupt priority of SysTick? Does a higher priority value represent a higher urgency? 3. Is the SysTick interrupt enabled by default? 4. Suppose a clock of 16MHz is used to drive the system timer. What is the maximum interval between two consecutive SysTick interrupts we can possibly obtain?

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