1- Consider a 1-address CPU that has a memory unit with 128K words of 32 bits each. An instruction is stored in one word of memory. The instruction format is divided into four fields: opcode field, 2-bit addressing mode field that specifies direct, indirect, indirect with pre-decrement, or indirect with post-increment addressing mode, a register field that specifies one of 32 registers, and an address field. For your information, given an address Direct addressing is where the operand is located in M[address]. Indirect addressing is where the operand is located in M[M[address]]. Indirect addressing with pre-decrement is where the operand is located in M[-M[address]]. Indirect addressing with post-increment is where the operand is located in M[M[address]+). (a) What is the maximum number of opcodes that can be incorporated into the CPU? How many bits are in the opcode field, the register field, and the address field? Draw the instruction format and indicate the number of bits in each field. (b) How many bits are in the registers PC, MAR, MDR, IR, and AC