$1)$ Consider a $4-$way set associative cache of size $4$KB and block size of $64$bytes. Consider $25\%$ writes, miss penalty of $40$ cycles, hit time of $1$ cycle and mem write time of $6$ cycles. How can the following happen under the condition that the memory miss penalty, $\%$ write and hit time remain the same for both the cases? Reason your findings in a few sentences.

$$

$($a$)$ Avg. Memory access for Write Back cache $>$ Write through cache $-$ No write allocate

$($b$)$ Avg. Memory access for Write Back cache $>$ Write through cache $-$ Write allocate