1. Consider the two MIPS assembly code fragments given below. Assume that the register t1 contains the memory address 0x1000 0000 and the register St2 contains the memory address 0x1000 0010. Note that the MIPS architecture utilizes big-endian addressing. i) lbu $t0, 0($t1) sw $te, e($t2) sh $te, e($t2) Assume that the word-size data stored (in big endian format) at address 0x1000 0000 is 0x8080 8080. Determine the addresses and contents (data values) of all memory bytes (locations) written by the version of the "store" instruction in each case upon executing the two- instruction sequence. Assume that the memory word pointed to by $t2 is initialized to Ox0000