Question: [1] Consider three different processors P1, P2, and P3 executing the same instruction set with the clock rates and CPIs given in the following table.


[1] Consider three different processors P1, P2, and P3 executing the same instruction set with the clock rates and CPIs given in the following table. Processor Clock Rate CPI 3 GHz 1.5 P2 2.5 GHz 1.0 P3 4 GHz 2.2 P1 (a) Which processor has the highest performance expressed in instructions per second? (b) If the processors each execute a program in 10 seconds, find the number of cycles and the number of instructions. [2] Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the following table. P1 Processor Clock Rate CPI Class A CPI Class B CPI Class C CPI Class D 2.5 GHz 2 3 3 P2 3 GHZ 2 2 2 2 (a) Given a program with 10 instructions divided into classes as follows: 10% class A, 20% class B, 50% class C, and 20% class D, what is the global CPI for each implementation? (b) Which implementation is faster? (c) Find the clock cycles required in both cases. [3] The following table shows the number of instructions for a program. Arith Store Load Branch Total 650 100 600 50 1400 (a) Assuming that Arithmetic instructions take 1 cycle, load and store 5 cycles, and branches 2 cycles, find the CPI for the program? (b) What is the execution time of the program in a 2 GHz processor? (c) If the number of load instructions can be reduced by one half, what is the speedup and the CPI? [4) Compilers can have a profound impact on the performance of an application on given a processor. This problem will explore the impact compilers have on execution time. Compiler A Compiler B No. Instructions Execution Time No. Instructions Execution Time 1.00E+09 1.1 s 1.2E+09 1.8s For the same program, two different compilers are used. The table above shows the execution time of the two different compiled programs. Find the average CPI for each program given that the processor has a clock cycle time of 1 ns. [5] You have a system that contains a special processor for doing floating-point operations. You have determined that 50% of your computations can use the floating-point processor. The speedup of the floating pointing-point processor is 15. (a) Overall speedup achieved by using the floating-point processor. (b) Overall speedup achieved if you modify the compiler so that 75% of the computations can use the floating-point processor. What fraction of the computations should be able to use the floating-point processor in order to achieve an overall speedup of 2.25? [6] For the purpose of solving a given application problem, you benchmark a program on two computer systems. On system A, the object code executed 80 million Arithmetic Logic Unit operations (ALU ops), 40 million load instructions, and 25 million branch instructions. On system B, the object code executed 50 million ALU ops, 50 million loads, and 40 million branch instructions. In both systems, each ALU op takes 1 clock cycles, each load takes 3 clock cycles, and each branch takes 5 clock cycles. (a) Compute the relative frequency of occurrence of each type of instruction executed in both systems. (b) Find the CPI for each system. (c) Assuming that the clock on system B is 10% faster than the clock on system A, which system is faster for the given application problem and by how much percent? [7] A given application written in Java runs 15 seconds on a desktop processor. A new Java Compiler is released that requires only 0.6 as many instructions as the old compiler. Unfortunately, it increases the CPI by 1.1. How fast can we expect the application to run using the new compiler? [8] Our favorite program runs in 10 seconds on computer A, which has a 2 GHz clock. We are trying to help a computer designer build a computer, B, which will run this program in 6 seconds. The designer has determined that a substantial increase in the clock rate is possible, but this increase will affect the rest of the CPU design, causing computer B to require 1.2 times as many clock cycles as computer A for this program. What clock rate should we tell the designer to target? [9] Two different compilers are being tested for a 500 MHz machine with three different classes of instructions: Class A, Class B, and Class C, which require 1, 2 and 3 cycles (respectively). Both compilers are used to produce code for a large piece of software. . Compiler 1 generates code with 5 billion Class A instructions, 1 billion Class B instructions, and 1 billion Class C instructions. Compiler 2 generates code with 10 billion Class A instructions, 1 billion Class B instructions, and 1 billion Class C instructions. (a) Which sequence will be faster according to MIPS? (b) Which sequence will be faster according to execution time
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