Question: 1. Design a direct mapping and 2 way set associative mapping structure with 512KB cache and 256 MB memory size. Write the address limits of

1. Design a direct mapping and 2 way set associative mapping structure with 512KB cache and 256 MB memory size. Write the address limits of main memory, line numbers of cache, set numbers and number of bits. Explain the structure and write the advantages, drawback of the method. ( 40 points) 2. Explain one 1 error correction process and solve the following problem. Assume that the 8-bit input word is written to memory as 11011011 , with data bit D1 in the rightmost position. A soft error occurs and D4 changes its state. Find the syndrome word and explain the process correcting D4. (35 points) Layout of Data Bits and Check Bits 3. Explain the function and types of RAID, write the pros and cones of each. (25 points)

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