$1.$ Draw a PLA circuit to implement the following functions:

X $=$ AB'C $+$ A$\text{'}$C $+$ ACD'

Y $=$ A'CD $+$ AB'D $+$ ABC'

Z $=$ A'B'C'D' $+$ AB'D $+$ A'CD

$2.$ Draw a PAL circuit to implement the following functions $($assume that the fixed OR gates have $3$ inputs$)$:

W $($A$,$ B$,$ C$,$ D$)=$ACD'$+$BC$\text{'}$D

X $($A$,$ B$,$ C$,$ D$)=$A'BC' $+$ A'CD'

Y $($A$,$ B$,$ C$,$ D$)=$ A'C'D' $+$ ACD $+$ A'CD

Z $($A$,$ B$,$ C$,$ D$)=$ A'BC' $+$ A'CD' $+$BD$+$A'C'D