$1$: float dotprod$($float x$[8],$ float y$[8])2$: $\{3$: float sum $=0\mathrm{.}0$; $4$ int i; $5$: for $($i $=0$; i $<8$; i$++)6$: sum $+=$ x$[$i$]*$ y$[$i$]$; $7$: return sum; $8$: $\}$ b$)$ With the following assumptions:$-$ Floats are $4$ bytes, that x is loaded into the $32$ bytes of contiguous memory starting at address $0$ and that y starts immediately after x at address $32.-$ A direct$-$mapped cache block is $16$ bytes $($big enough to hold four floats$)$ and a total cache size of $32$ bytes. $-$ The variables sum and i are stored in a CPU register and thus do not require a memory reference. For each memory reference $($first two are given below$)$ in the code, identify it as a cache hit or miss. Show the intermediate steps and the final content of the cache$\mathrm{.}1$: float dotprod$($float x$[8],$ float y$[8])2$: $\{3$: float sum $=0\mathrm{.}0$; $4$ int i; $5$: for $($i $=0$; i $<8$; i$++)6$: sum $+=$ x$[$i$]*$ y$[$i$]$; $7$: return sum; $8$: $\}$ b$)$ With the following assumptions:$-$ Floats are $4$ bytes, that x is loaded into the $32$ bytes of contiguous memory starting at address $0$ and that y starts immediately after x at address $32.-$ A direct$-$mapped cache block is $16$ bytes $($big enough to hold four floats$)$ and a total cache size of $32$ bytes. $-$ The variables sum and i are stored in a CPU register and thus do not require a memory reference. For each memory reference $($first two are given below$)$ in the code, identify it as a cache hit or miss. Show the intermediate steps and the final content of the cache.