1) For choose the correct answer for (A) :(parallel shift / serial shift / toggle / load / clear) For choose the correct answer for (B) :(parallel shift / serial shift / toggle / load / clear) For choose the correct answer for (C) :(parallel shift / serial shift / toggle / load / clear) 2) 3) 4) 5)

The following diagram shows waveform output for PIPO shift register. Identify what happens at (A), (B) and (C). CLK CLR J Serial inputs K SHILD D D Parallel data inputs D D Parallel outputs (B) (A) 7 (C) Table below shows initial values for each flip-flop in 5-bit Johnson counter. What is the value for Q4Q3 Q2Q1 Q, at clock pulse 2? Clock Pulse Q4 Q3 Q2 Q1 Qo Initial 0 0 0 1 0 1 2 O 01000 0 10001 00001 O 00101 Identify the following shift register. In k GE CL Q7 QO bbbbbbbb 8-bit SISO shift register 8-bit SIPO shift register 8-bit PIPO shift register 8-bit PISO shift register If an 8-bit Ring counter has an initial state 1101 0000 and is shifted right, what is the state after the nine (9) clock pulse? O 0011 0100 O 0110 1000 O 1110 1000 O 1111 0100 AC lo D 0 The figure above shows parity circuit to generate even or odd parity using Modulo 2 summation. Given the binary value of ABCD is 1011 Which of the following statement is TRUE about output X? X is LOW and the input has total bit 1 equal to ODD. X is HIGH and the input has total bit 1 equal to ODD. X is HIGH and the input has total bit 1 equal to EVEN. X is LOW and the input has total bit 1 equal to EVEN