1. Given the program loop_thread.c in Figure 1.1 and the CPU architecture with shared L3 cache as shown in Figure 1.2. The CPU uses Snooping-Based Protocol for cache coherency. The program is compiled and executed as parallel programs on the three-core CPU with three threads executing on the CPU. Assuming that the thread scheduler dynamically schedules each thread to different CPU cores (i.e. thread 0 on core 0, thread 1 on core 1 and thread 2 on core 2), explain how the memory access sequence on the shared memory multiprocessor might be like for each thread when line 19 is executed. Explain any assumptions made in your answer. loop_thread.c (-/2022jan/threads) - GVIM File Edit Tools Syntax Buffers Window Help 1 #include 2 #include 3 #include comp.h> 4 #include 5 6 #define N 100000000 7 8 int main() 9 10 clock_t begin, end; 11 double seconds; 12 13 for (int j=0; j