1. Implement the following functions given below using a single ROM coded in Verilog:

F( x, y , z) = Majority(x, y, z)

What is the size of the ROM? What is the truth table for the majority gate? Implement the circuit in behavioral Verilog and simulate it in ISIM. Remember to use a test bench and top level circuit. After proving that your unit under test is properly designed, synthesize the circuit in the Xilinx environment. Use the appropriate switches and LEDs to prove that your circuit works properly to the TA or instructor.

1) show code and simulation results ; 2) show board test results