$1)$ Implementing Boolean functions with decoders $[16$ points$]$

Let's get started by writing the equations, using SystemVerilog dataflow syntax, for each of your functions, in terms of the p bus elements. For instance, if you wanted to realize

F$0($R$,$S$,$T$,$U$)=$ R$\text{'}$S$\text{'}$T$\text{'}$U$\text{'}+$ R$\text{'}$S$\text{'}$T$\text{'}$U

you can determine that the two minterms are $0000$ and $0001,$ respectively. The components of the active$-$low decoder to NAND together would be elements $0$ and $1$ of the p bus. This would be implemented with a dataflow NAND as

assign right$[0]=$ ~$($ p$[0]$ & p$[1])$;

Remember to use a dataflow AND to form the complement of any expressions with more than three terms.

If you are getting errors trying to submit a very long expression, that is a hint that you are making a mistake. There is no issue with the permitted length of the expression.