1. Instructions Consider the following single cycle processor from class:

Reusing the existing logic, and adding as few additional components and control wires as possible, implement the following new R type instruction:

max $t0, $t1, $t2 # if $t1>$t2, $t0:=$t1, else $t0=$t2

2. Instructions

Using the same diagram, fill in the table for the following instructions. Indicate (in words, not on the diagram) what you need to add, if anything.

a. subi

b. bneq

c. bneqz

d. move

The Main Decoder Inst. OP RegWrite RegDst ALUSrc Branch MemWrite MemToReg ALUOp R-type 000000 100011 101011 beq 000100 addiu 001001 SW 01 Unit anc OK CIK CiK A1 A RD A RD Deta Nemory D Register File ipn Extend Rwut The Main Decoder Inst. OP RegWrite RegDst ALUSrc Branch MemWrite MemToReg ALUOp R-type 000000 100011 101011 beq 000100 addiu 001001 SW 01 Unit anc OK CIK CiK A1 A RD A RD Deta Nemory D Register File ipn Extend Rwut