Question: 1 Introduction In this lab, we will look at two circuits. First, we will need to implement a circuit based on a given logic function

1 Introduction
In this lab, we will look at two circuits. First, we will need to implement a circuit based on a given logic function/expression. Next, you will implement the same logic using a different circuit designed from the simplified version of the expression.
2 Prelab
This prelab consists of the following parts.
1) Use Boolean algebra to minimize the expression below as far as possible. Complete the truth table (on the Checklist) both for your simplified expression and for the original.
\[
f(a, b, c)=\left\{\left[\left(a^{\prime}\oplus b\right)(a c)+\left(a^{\prime}+b^{\prime}+c\right)^{\prime}\right] b\right\}^{\prime}
\]
2) Create circuit diagrams *using Digital* for the original expression and the simplified expression, identifying the chips you will use from those available in Digital and the pins to be connected for each gate. This should look similar to the diagrams you were given for the first lab.
3 Checkpoints
Build the circuits in Digital using the TTL 7400 series chips located in the component library. Demonstrate the output of your two circuits, showing that they agree with each other using the truth table. Checkpoint 1:
- Show the circuit diagram of the original expression below
- Demonstrate the working circuit implementation in the video
Checkpoint 2:
- Type the step-by-step process of expression simplification/minimization below (inserting a scan/picture of handwritten expression is not accepted)
- Show the circuit diagram of the simplified expression below
- Demonstrate the working circuit implementation in the video
When demonstrating the outputs of your two circuits, show that they agree with each other using the completed truth table below.
\begin{tabular}{|c|c|c|c|c|c|c|}
\hline & & & expected & expected & demonstrated & demonstrated \\
\hline a & b & c & original function & simplified function & original function & simplified function \\
\hline 0 & 0 & 0 & & & & \\
\hline 0 & 0 & 1 & & & & \\
\hline 0 & 1 & 0 & & & & \\
\hline 0 & 1 & 1 & & & & \\
\hline 1 & 0 & 0 & & & & \\
\hline 1 & 0 & 1 & & & & \\
\hline 1 & 1 & 0 & & & & \\
\hline 1 & 1 & 1 & & & & \\
\hline
\end{tabular}
1 Introduction In this lab, we will look at two

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