1. MIPS Machine Code a. P&H(2.25) <2.7>.

The following instruction is not included in the MIPS instruction set: rpt $t2, loop # if (R[rs]>0) R[rs]=R[rs]-1, PC=PC+4+BranchOffset If this instruction were to be implemented in the MIPS instruction set, what is the most appropriate instruction format? Explain why. Provide a sequence of MIPS instructions that performs the same operation. Ungraded, but examworthy: Postulate why this instruction wasnt included the MIPS ISA

. b. Translate the following MIPS assembly into machine code providing the following for each instruction. First, identify the instructions format. Second, provide the decimal value for each instruction field. Third, provide the hex encoding of the entire instruction. Assume Begin is at 0x00400000. begin: andi $s1, $zero, 321 addi $s0, $zero, -32768 loop: sra $s0, $s0, 5 addiu $s1, $s1, 1 slti $t0 $s0, -1 bne $t0, $zero, loop j begin

c. Weve discussed in class and on Canvas that you cannot load an arbitrary 32 bit integer (e.g., 0x320FF1CE) using a single instruction. Look up the liu instruction and provide a two-instruction sequence that loads 0x320FF1CE into $t0. Then, assuming that liu is not supported by the ISA, provide a valid three-instruction sequence that loads 0x320FF1CE into $t0. Translate these into MIPS machine code providing the same steps as part 1.b.