( ) 1. What is one disadvantage of an S-R flip-flop? a. It has no enable...

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( ) 1. What is one disadvantage of an S-R flip-flop? a. It has no enable input. b. It has an invalid state. c. It has no clock input. d. It has only a single output ( ) 2. If both inputs of a gated S-R flip-flop are LOW, what will happen when the flip-flop is enabled? ( a. No change will occur in the output. b. An invalid state will exist. c. The output will toggle. d. The output will reset. ) 3. What is the hold condition of a flip-flop? a. both S and R inputs activated b. no active S or R input c. only S is active d. only R is active ( ) 4. The output of a gated S-R flip-flop changes only if the: a. flip-flop is set b. control input is active c. flip-flop is reset d. input data has no change ( ) 5.The selector inputs to an arithmetic/logic unit (ALU) determine the: a. selection of an IC b. arithmetic or logic function c. data word selection ( ) 6. Which logic gate's Truth table is as the following? A B 0 a. AND 0 0 d. clock frequency to be used 1 1 b. NOR 0 0 1 1 0 1 c. OR Ex2 C 0 1 0 0 1 d. NAND X 1 0 ( ) 1. What is one disadvantage of an S-R flip-flop? a. It has no enable input. b. It has an invalid state. c. It has no clock input. d. It has only a single output ( ) 2. If both inputs of a gated S-R flip-flop are LOW, what will happen when the flip-flop is enabled? ( a. No change will occur in the output. b. An invalid state will exist. c. The output will toggle. d. The output will reset. ) 3. What is the hold condition of a flip-flop? a. both S and R inputs activated b. no active S or R input c. only S is active d. only R is active ( ) 4. The output of a gated S-R flip-flop changes only if the: a. flip-flop is set b. control input is active c. flip-flop is reset d. input data has no change ( ) 5.The selector inputs to an arithmetic/logic unit (ALU) determine the: a. selection of an IC b. arithmetic or logic function c. data word selection ( ) 6. Which logic gate's Truth table is as the following? A B 0 a. AND 0 0 d. clock frequency to be used 1 1 b. NOR 0 0 1 1 0 1 c. OR Ex2 C 0 1 0 0 1 d. NAND X 1 0