1. Write the expanded SOP equations for c3 and C4 of a carry-lookahead adder, using all p and g terms (do not expand the pi and gi terms to their corresponding x; and y; inputs). 2. Draw the logic networks for Stages 2 and 3 of a carry-lookahead adder. Label all inputs, include the co and the p and g terms from Stages and 1 (if possible, draw the signal wires in different colors)