10.5 Two's-complement numbers Prove the following for k-bit 2's-complement numbers x and y. a. A 1-bit arithmetic right shift of x always produces Lx/2], regardless of the sign of x. CK-1ck. a carry-out signal ck, the latter can be derived b. In the addition s x + y, overflow occurs iff C. In an adder computing s = x + y but not producing externally as c--1 VSk-ik-1Vyk-i)