Question: 14. Given that the opcode for the SUB instruction is of the format: AND Rd, Rr 0010 00rd dddd rrrr 0 ? d ? 31,

14. Given that the opcode for the SUB instruction is of the format:

AND Rd, Rr

0010 00rd dddd rrrr

0 ? d ? 31, 0 ? r ? 31

What is the machine instruction generated by an assembler for the code?

AND R10, R11

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