19. How many bits are needed for the opcode? 20. How many bits are left for the address part of the instruction d. 10 21. What is the maximum allowable size for memory? a. 1024 b. 2047 C. 512 d. 226 Use the following information for questions 22-25 uppose aa cache computer using direct mapped cache has 24 bytes of byte-addressable main memory, and a of 64 blocks, where each cache block contains 4 bytes. 22. How 24 bit address is divided into tag, line number and byte number for direct mapped cache? a. Tag 22 bits, block - o, byte offset- 2 bits c. Tag- 16 bits, block - 6, byte offset- 2 bits d. Tag- 18 bits, block 5, byte offset 2 bits 23. How 24 bit address is divided into tag, line number and byte number for fully-associative cache? a Tag 24 bits, block- 0, byte offset 2 bits b. Tag- 21 bits, block- 1, byte offset 2 bits e. Tag 22 bits, block -0, byte offset- 2 bits d Tag- 17 bits, block - 1, byte offset- 0 bits 24. How 24 bit address is divided into tag, line number and byte number for four-way set associative cache? a Tag - 18 bits, set- 4, byte offset- 2 bits b. Tag- 17 bits, set-5, byte offset- 2 bits c Tag - 17 bits, set- 4, byte offset 2 bits d. Tag - 19 bits, set-3, byte offset 2 bits 25. In case of direct mapped cache to which cache block will the memory address Ox0ID61B map d. 24 26. What is ROM used for, in a computer? b. 7 a. Storing system BIOS and calibration tables b. Storing the user program Storing the operating system Storing the log of events c. d. 27. What type of memory cells are used to build cache? a FLASH b. ROM c. DRAM d SRAM 28. Part of hard drive is allocated for virtual memory a. True b. False