1a)

f=AB'+CD+B'C'D'+A'BD

1c)

f'=A'B'C'D+CD'+AB+BD'

f=(A+B+C+D')(C'+D)(A'+B')(B'+D)

6) Implement these Boolean equations in the form of schematic circuits a. Provide a gate level schematic or block diagram implementation of the solution from (1c) (use gates with any number of inputs desired) b. Redo this circuit implementation of (1c) employing open collectors to reduce the resource requirement where appropriate (use a vertical bar across the end of the gate to indicate an open collector atyle of gate, 1ike this Di, c. Implement this your solution from (la) using universal gates, choose a universal gate and implement a gate level schematic or block diagram of the circuit using only inverters and as many of the universal gates as you wish. Simplify your solution by collapsing unnecessary inverters but your final solution can be made of only the universal gate you chose and inverters (circles on inputs can be used to symbolize inverters, if needed)