Question: ( 2 0 points ) Design a 1 6 - bit binary parallel adder using TTL 7 4 2 8 3 chips. Show the schematic

(20 points) Design a 16-bit binary parallel adder using TTL 74283 chips. Show the schematic diagram.
(20 points) Design a 8-bit binary subtractor using TTL 74x283 chips. Show the schematic diagram.
(30 points) For the following circuit, determine the sum outputs for the following cases (show your works).
(a)A=1101,B=0101,ADD=1,SUB=0
(b)A=1101,B=0101,ADD=0,SUB=1
(c)A=1101,B=0101,ADD=0,SUB=0
(30 points) Determine F,CN+1, and OVR outputs for the following inputs to 74LS382(show your works).
(a)[S]=011,[A]=1100,[B]=0110,CN=0
(b)[S]=100,[A]=1100,[B]=0110,CN=0
(c)[S]=010,[A]=1100,[B]=0110,CN=1
Notes: S inputs select operation. OVR =1 for signed-number overflow.
B=4-bit input number
B=4-bit input number CN+4= carry out ofMSB position
CN= carry into LSB position OVR = overflow indicator
S=3-bit operation select inputs
( 2 0 points ) Design a 1 6 - bit binary parallel

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