Question: 2 . ( 1 2 points ) Write Verilog code for a Set - Reset flip - flop that functions as follows: If the

2.(12 points) Write Verilog code for a "Set-Reset" flip-flop that functions as follows: If the \( S / R \) flip-flop output is currently a '0', it should be driven to a '1' whenever \( S \) is asserted by itself, and then held in the '1' state for as long as \( S \) is asserted. If the output is currently a '1', it should be driven to a '0' whenever \( R \) is driven by itself, and then held there for as long as \( R \) is asserted.
2 . ( 1 2 points ) Write Verilog code for a "Set

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