Question: 2. (18 points) Answer the following questions: a. (2 points) (True / False) ARM fabricates their own integrated circuits. b. (4 points) List and describe

 2. (18 points) Answer the following questions: a. (2 points) (True

/ False) ARM fabricates their own integrated circuits. b. (4 points) List

2. (18 points) Answer the following questions: a. (2 points) (True / False) ARM fabricates their own integrated circuits. b. (4 points) List and describe the registers in the ARM Register File. Make sure to include all the special purpose registers. c. (2 points) The most significant bits of data are stored at smaller address locations is defined as Endian d. (3 points) Provide an example of an embedded system (don't use an example from class). Also, describe the functionality of the microcontroller in your example embedded system. Does your example have a hard or soft deadline? e. (3 points) Circle the type of computer architecture (1 answer from each bullet below) in the ARM Cortex-A9. - RISC / CISC - von Neumann / Harvard - Pipelined / Super-pipelined / Superscalar f. (2 points) Describe a load/store architecture. What memory has access to the ALU in a load/store architecture? g. (2 points) Write ARM assembly to load the 'M' from the string defined below. Note: this will be two assembly instructions. thisArray: ascii "Hello, Mr. Bond" 2. (18 points) Answer the following questions: a. (2 points) (True / False) ARM fabricates their own integrated circuits. b. (4 points) List and describe the registers in the ARM Register File. Make sure to include all the special purpose registers. c. (2 points) The most significant bits of data are stored at smaller address locations is defined as Endian d. (3 points) Provide an example of an embedded system (don't use an example from class). Also, describe the functionality of the microcontroller in your example embedded system. Does your example have a hard or soft deadline? e. (3 points) Circle the type of computer architecture (1 answer from each bullet below) in the ARM Cortex-A9. - RISC / CISC - von Neumann / Harvard - Pipelined / Super-pipelined / Superscalar f. (2 points) Describe a load/store architecture. What memory has access to the ALU in a load/store architecture? g. (2 points) Write ARM assembly to load the 'M' from the string defined below. Note: this will be two assembly instructions. thisArray: ascii "Hello, Mr. Bond

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