#2

2.9 Exercises Describe why a general-purpose processor could cost less than a single-purpose processor you design yourself. 2. Detail the stages of executing the MOV instructions of Figure 2.4, assuming an 8-bit processor and a 16-bit IR and program memory following the model of Figure 2.1. Example: the stages for the ADD instruction are -- (1) fetch M[PC] into IR, (2) read Rn and Rm from register file through ALU configured for ADD, storing results back in Ra. 3. Add one instruction to the instruction set of Figure 2.4 that would reduce the size our summing assembly program by 1 instruction. (Hint add a new branch instruction). Show the reduced program Create a table listing the address spaces for the following address sizes: (a) 8-bit, () 16-bit, (c) 24-bit. (d) 32-bit, (e) 64-bit. 5. Illustrate how program and data memory fetches can be overlapped in a Harvard architecture. 6 Read the entire problem before beginning: (a) Write a C program that clears an array "short int M[256]." In other words, the program sets every location to 0. Hint: your program should only be a couple lines long. (b) Assuming M starts at location 256 (and thus ends at location 511), write the same program in assembly language using the earlier instruction set. (c) Measure the time it takes you to perform parts a and b. and report those times. 7. Acquire a databook for a microcontroller. List the features of the basic version of that microcontroller, including key characteristics of the instruction set (number of instructions of each type, length per instruction, etc.). memory architecture and Embedded System Design. Vahid Givargi Last update: 09/27/99 2:51 PM