$[25$ points$]$ Fill out the following table for the given memory reference stream on a bus$-$

based shared$-$memory machine that supports the Illinois MESI protocol. Show the state

transition of each processor and the bus transactions. All of the references are to the same

memory location $x$:$\frac{r}{w}$ indicates read or write, and the digit refers to the processor issuing

the reference, e$.$g$.,$ r$1$ means processor P$1$ reads X$.$ Assume that all caches are initially

empty, all caches are write$-$allocated, and use BusUpgr whenever possible.

$r1,r3,w2,r2,r3,w1,w3,r1,r2,r3$