Question: 2. Assume that you have a 32-bit MIPS processor with a direct mapped data cache with the capacity 4096 bytes and a block size of

2. Assume that you have a 32-bit MIPS processor with a

2. Assume that you have a 32-bit MIPS processor with a direct mapped data cache with the capacity 4096 bytes and a block size of 16 bytes. The cache is initially empty (all valid bits are 0). Which sets of the cache have been updated after that the following program has been executed? For each of the sets, specify the set number, the value of the valid bit, and the tag value of the data cache. lui Sto, 0x12ff 1 $t1,0x1240 ($t0) $t2,0x5aa4 ($t0) t3, 0x4248 (St0) 4 lw 2. Assume that you have a 32-bit MIPS processor with a direct mapped data cache with the capacity 4096 bytes and a block size of 16 bytes. The cache is initially empty (all valid bits are 0). Which sets of the cache have been updated after that the following program has been executed? For each of the sets, specify the set number, the value of the valid bit, and the tag value of the data cache. lui Sto, 0x12ff 1 $t1,0x1240 ($t0) $t2,0x5aa4 ($t0) t3, 0x4248 (St0) 4 lw

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