Question: 2 cache memories that one SALU LOAD STORE Problem 3 (-40 marks) A new version of the MIPS architecture (called MIPS2) uses cache memories clack

 2 cache memories that one SALU LOAD STORE Problem 3 (-40

2 cache memories that one SALU LOAD STORE Problem 3 (-40 marks) A new version of the MIPS architecture (called MIPS2) uses cache memories clack excles to access but the access is pipelined and CONTROL have frequencies of 40% 20%, 15% and 25%, respectively a) How many pipeline stages has the new MIPS2. Draw the pipeline structure. b) Assuming forwarding technique is used, determine the data hazards and compos penalties c) Assuming branch conditions and target addresses are computed in the decode stage, control hazards and compute the stall penalties. 5) Compute the average CPI of the MIPS2. Using the CPU equation, compute the speed-up of MIPS2 compared to the onginai Mir hazards and compute the sell 2 cache memories that one SALU LOAD STORE Problem 3 (-40 marks) A new version of the MIPS architecture (called MIPS2) uses cache memories clack excles to access but the access is pipelined and CONTROL have frequencies of 40% 20%, 15% and 25%, respectively a) How many pipeline stages has the new MIPS2. Draw the pipeline structure. b) Assuming forwarding technique is used, determine the data hazards and compos penalties c) Assuming branch conditions and target addresses are computed in the decode stage, control hazards and compute the stall penalties. 5) Compute the average CPI of the MIPS2. Using the CPU equation, compute the speed-up of MIPS2 compared to the onginai Mir hazards and compute the sell

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