$2.$ Consider a fully associative TLB with a capacity of $16$ virtual$-$to$-$physical page translations. Assuming that the physical memory has a capacity of $16$ K pages, each $2$ KB in size, and a $32-$bit address, answer the following:

$($a$)$ How many bits are associated with each PTE $($including one valid bit and one dirty bit$)?$

$($b$)$ How many bits are associated with each page translation in the TLB $($including one valid bit and one dirty bit$)?$

$($c$)$ How many bits must the page table register hold?

$($d$)$ How many bits of left$-$shifting must the PPN undergo f or determination of the physical memory address of $\backslash ($ t $\backslash )$ he first byte of a physical page?

$($e$)$ How many address bits are required for the physical memory? What is the capacity of this memory in bytes?