2. Consider the following assembly program for the 4-cycle pipelined microMIPS CPU: lw $t0, A ($zero)...

  

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2. Consider the following assembly program for the 4-cycle pipelined microMIPS CPU: lw $t0, A ($zero) add $t3, $t1, $t0 add $t4, $t3, $t2 sub $t7, $t8, $t9 beq $t5, $t6, skip xor $t3, $t0, $t1 (a) Show the task-time diagram for this program for the pipelined CPU. Insert bubbles as appropriate to ensure proper program execution. (b) Describe any ways to minimize the number of bubbles required to execute the program. This may take the form of modifications to the CPU architecture or changes to the program (while ensuring that it still performs the same task). Assume that the beq instruction will evaluate to false. 2. Consider the following assembly program for the 4-cycle pipelined microMIPS CPU: lw $t0, A ($zero) add $t3, $t1, $t0 add $t4, $t3, $t2 sub $t7, $t8, $t9 beq $t5, $t6, skip xor $t3, $t0, $t1 (a) Show the task-time diagram for this program for the pipelined CPU. Insert bubbles as appropriate to ensure proper program execution. (b) Describe any ways to minimize the number of bubbles required to execute the program. This may take the form of modifications to the CPU architecture or changes to the program (while ensuring that it still performs the same task). Assume that the beq instruction will evaluate to false.