Question: 2. Consider the following simple C++ code function include accum h. void accumulate (int a, int b, int c, int d, int &dout) int t1,

2. Consider the following simple C++ code function include accum h.

void accumulate (int a, int b, int c, int d, int &dout)

2. Consider the following simple C++ code function include accum h. void accumulate (int a, int b, int c, int d, int &dout) int t1, t2 t1 a b t2 t 1 C; dout. a Draw a simple dataflow graph for this function. b) Draw the block diagram of the hardware implementation ofthis function. Use high level components such as adders, multiplexers, registers, etc. c Assuming there is no constraint, what is latency and throughput of this code? d) Assuming an initial constraint of II 3 is applied, what is latency and throughput of this code? How many levels of pipelining is used? Is there any changes in the resources needed

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