Question: 2. Design a datapath for the following six instructions add R1, R2, R3 sub R1, R2, R3 sw R1, R2,7-bits-data lw R1. R2, 7-bits-data bne

2. Design a datapath for the following six instructions add R1, R2, R3 sub R1, R2, R3 sw R1, R2,7-bits-data lw R1. R2, 7-bits-data bne R1, R2,7-bits-data beq R1, R2, 7-bits-data # RI R2+R3 #Al-R2-R3 # M(R2+ 7-bits-data)-RI # RI-M(R2+ 7-bits-data) # if RI-R2 then # if RI-R2 then jump to PC+2+data jump to PC+2+data Assume each instruction has 16 bits. Also assume that there are 8 registers, an instruction memory unit with 1K bytes, and a data memory unit with 1K bytes. The 7-bits-data is in 2's complement format! a) Define the instruction formats. b) Draw a complete datapath (including the details of the Next Address Logic unit) which is able to perform the above operations; be sure to include Register File, ALU, Memory Unit, PC, control signals, number of wires from one component to the other, and any other components that you may need. Write any assumption that you make c) Design the corresponding control unit. Write the simplified Boolean equations and draw the logic diagram for them
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