2. Exceptions [Hint: For this problem you will have to practice looking up information in documentation, specifically, the additional information for SPIM and MARS.] Consider the following sequence of instructions: lw $t0, 0($a0) add $t1, $a2, $a1 bne $t2, $zero, later a. For each instruction, what type of exception could they cause and what would the corresponding cause register code be (see App A.7)? For the pipeline shown in Figure 4.65 in the textbook, what is the earliest stage in which each of these exceptions can be detected? b. Assuming that the lw does not trigger any exceptions, but the add and bne do, describe what happens in the pipeline starting in the cycle in which the first exception is detected and ending when the first instruction of the excpetion handler has been fetched. Draw a pipeline diagram illustrating what happens. c. Rewrite the base exception handler that comes with SPIM (described in App A.7) to look for arithmetic overflow exception. For an arithmetic overflow exception inspect the arithmetic instruction that caused the exception (i.e., you will need to use EPC) and modify the contents of the destination register of this instruction so that the operation saturates (e.g., if the result was too large of a positive number to represent in 32 bits, the result is the largest positive number). Write a small MIPS program that exercises your exception handler, making sure to cause overflow with different instructions and cause both positive and negative overflows. Hand in an assembly file for both the exception handler and the test program.

2. Exceptions Hint: For this problem you will have to practice looking up information in documentation, specifically, the additional information for SPIM and MARS.] Consider the following sequence of instructions: lw $t0, 0 (?a0) add $tl, $a2, $al bne $t2, $zero, later For each instruction, what type of exception could they cause and what would the corresponding cause register code be (see App A.7)? For the pipeline shown in Figure 4.65 in the textbook, what is the earliest stage in which each of these exceptions can be detected? Assuming that the lw does not trigger any exceptions, but the add and bne do, describe what happens in the pipeline starting in the cycle in which the first exception is detected and ending when the first instruction of the excpetion handler has been fetched. Draw a pipeline diagram illustrating what happens. Rewrite the base exception handler that comes with SPIM (described in App A.7) to look for arithmetic overflow exception. For an arithmetic overflow exception inspect the arithmetic instruction that caused the exception (i.e., you will need to use EPC) and modify the contents of the destination register of this instruction so that the operation saturates (e.g., if the result was too large of a positive number to represent in 32 bits, the result is the largest positive number). Write a small MIPS program that exercises your exception handler, making sure to cause overflow with different instructions and cause both positive and negative overflows. Hand in an assembly file for both the exception handler and the test program a. b. c. 2. Exceptions Hint: For this problem you will have to practice looking up information in documentation, specifically, the additional information for SPIM and MARS.] Consider the following sequence of instructions: lw $t0, 0 (?a0) add $tl, $a2, $al bne $t2, $zero, later For each instruction, what type of exception could they cause and what would the corresponding cause register code be (see App A.7)? For the pipeline shown in Figure 4.65 in the textbook, what is the earliest stage in which each of these exceptions can be detected? Assuming that the lw does not trigger any exceptions, but the add and bne do, describe what happens in the pipeline starting in the cycle in which the first exception is detected and ending when the first instruction of the excpetion handler has been fetched. Draw a pipeline diagram illustrating what happens. Rewrite the base exception handler that comes with SPIM (described in App A.7) to look for arithmetic overflow exception. For an arithmetic overflow exception inspect the arithmetic instruction that caused the exception (i.e., you will need to use EPC) and modify the contents of the destination register of this instruction so that the operation saturates (e.g., if the result was too large of a positive number to represent in 32 bits, the result is the largest positive number). Write a small MIPS program that exercises your exception handler, making sure to cause overflow with different instructions and cause both positive and negative overflows. Hand in an assembly file for both the exception handler and the test program a. b. c