2. Given the following assembly code snippet, draw the ISA table assuming its 10 bits processor. Find the maximum addressable memory considering number of bits left for address in LD and ST instructions and maximum code size for jump space considering number of bits left for address in JMP instruction. You must take only given code piece as constraints without assuming any other instruction or register usage. (40 pts) LD R1, #1 LD R0, #2 LD R3, #3 ADD R2, R0, R3 SUB R1, R2, R1 ST R2, #4 2. Given the following assembly code snippet, draw the ISA table assuming its 10 bits processor. Find the maximum addressable memory considering number of bits left for address in LD and ST instructions and maximum code size for jump space considering number of bits left for address in JMP instruction. You must take only given code piece as constraints without assuming any other instruction or register usage. (40 pts) LD R1, #1 LD R0, #2 LD R3, #3 ADD R2, R0, R3 SUB R1, R2, R1 ST R2, #4