$(2$p$)1.$ You are given the following circuit. Each memory element has a $0\mathrm{.}1$ ns delay:

$1\mathrm{.}1.$ Fill in the followina timina diaaram accordinalv $(0\mathrm{.}5$n$)$

$1\mathrm{.}2.$ Describe the functionanty $(.$p$)$

$1\mathrm{.}3.$ Draw the circuit diagram for an up$/$down $3$ bit counter using JK flip$-$flops. $(1$p$)$ Hint: Use two multiplexers and a

selector signal that when $"1"$ selects the up counting functionality and when $"0"$ the down counting functionality.