$2$ Pipelining $2\mathrm{.}1$ Problem $1($adapted from Comp Org & Design Exercise $6\mathrm{.}2)$: A computer architect needs to design the pipeline of a new microprocessor. She has an example workload program core with $107$ instructions. Each instruction takes $100$ ps $($picosecond$)$ to finish. $(20$ points$)1.$ How long does it take to execute this program core on a non$-$pipelined processor? $(5$ points$)2.$ A simple RISC microprocessor has $5$ pipeline stages. Assume it is perfectly pipelined. How much speedup will it achieve compared to the nonpipelined processor? For this question, you need to compute the execution time for a stage $($cycle$),$ when the execution of one instruction is partitioned into $5$ stages. Also given a perfect pipeline, every cycle there is a new instruction finishes execution. $(5$ points$)3.$ The current state$-$of$-$the$-$art microprocessor has $17$ pipeline stages. Assume it is perfectly pipelined. How much speedup will it achieve compared to the nonpipelined processor? For this question, you need to compute the execution time for a stage, when the execution of one instruction is partitioned into $17$ stages. $(5$ points$)4.$ Real pipelining isn$$t perfect, since implementing pipelining introduces some overhead $($extra time$)$ per pipeline stage. Will this overhead affect instruction latency $($i$.$e$.,$ exec time per instruction$),$ instruction throughput $($i$.$e$.,$ instructions per second$),$ or both? $(5$ points