Question: 2. Repeat problem 1 (parts a, b, and c) using the same sizes specified but the cache is organized as a 2-way set associative cache
2. Repeat problem 1 (parts a, b, and c) using the same sizes specified but the cache is organized as a 2-way set associative cache that uses the Least Recently Used (LRU) replacement algorithm.
(1. A computer system uses 16-bit memory addresses that are byte addressable. It has a 2K-byte cache organized in a direct-mapped manner with 64 bytes per cache block. a. How many blocks are in the cache? b. Calculate the number of bits in each of the Tag, Block, and Offset fields of the memory address. c. When a program is executed, the processor reads data sequentially from the following byte addresses (shown in decimal form): 128, 144, 2176, 2180, 128, 2176 Assume that the cache is initially empty. For each of these, indicate which cache block the address maps to and whether the cache access will result in a hit or a miss. (Hint: you may find it easier to use the bit representation rather than using the mathematical equations). )
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