2.0 Basic SR Latches Information on a Basic SR Latch can be found in Section 5.1 of the textbook. For the first step lab9step1, build a Basic SR Latch with NOR gates using a block diagram/schematic file. This circuit is given in Figure 5.4a of your textbook. Name the inputs S and R; name the outputs Q and a. Use the DE2-115 board to observe the behavior of the latch. (Recommend R-SWO, s-sw1, Q-LEDRO, ~Q=LEDG7). Use the results to complete the characteristic table on the answer sheet. When you are convinced that the latch is performing as predicted, and you are confident you understand its behavior, demonstrate your circuit to the TA. Since latches and other memory devices can be built using either NAND or NOR gates, build another SR latch by replacing the NOR gates with NAND gates. Change the R input to S and the S input to R. Place an inverter on each input to create the "S R case. Use the DE2-115 board to observe the behavior of the latch. Use the results to complete the characteristic table on the answer sheet. When you are convinced that the latch is performing as predicted, and you are confident you understand its behavior, demonstrate your circuit to the TA. MCN