Question: 2.1 [5] For the following statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, and i are given and

 2.1 [5] For the following statement, what is the corresponding MIPS
assembly code? Assume that the variables f, g, h, and i are
given and could be considered 32-bit integers as declared in a C
program. Use a minimal number of MIPS assembly instructions. f = 9+
(n - 5): 2.2 [5] For the following MIPS assembly instructions above,
what is a corresponding statement? add f. 9. h add f. i.
f 2.8 (5) Translate Oxabcdef12 into decimal. 2.11 (5) For each MIPS
instruction, show the value of the opcode (OP), source register (RS), and
target register (RT) fields. For the I-type instructions, show the value of
the immediate field, and for the R-type instructions, show the value of

2.1 [5] For the following statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, and i are given and could be considered 32-bit integers as declared in a C program. Use a minimal number of MIPS assembly instructions. f = 9+ (n - 5): 2.2 [5] For the following MIPS assembly instructions above, what is a corresponding statement? add f. 9. h add f. i. f 2.8 (5) Translate Oxabcdef12 into decimal. 2.11 (5) For each MIPS instruction, show the value of the opcode (OP), source register (RS), and target register (RT) fields. For the I-type instructions, show the value of the immediate field, and for the R-type instructions, show the value of the destination register (RD) field. 2.14 (5) Provide the type and assembly language instruction for the following binary value: 0000 0010 0001 0000 1000 0000 0010 0000 two 2.15 (5) Provide the type and hexadecimal representation of following instruction: sw $t1, 32($t2) 2.16 [5] Provide the type, assembly language instruction, and binary representation of instruction described by the following MIPS fields: op=0, rs=3. rt=2. rd=3. shamt=0. funct=34 2.17 [5] Provide the type, assembly language instruction, and binary representation of instruction described by the following MIPS fields: op=0x23. rs-1. rt=2, const-0x4 2.21 (5) Provide a minimal set of MIPS instructions that may be used to implement the following pseudoinstruction: not $t1, $t2 W/ bit-wise invert 2.23 (5) Assume sto holds the value 0x00101000. What is the value of $t2 after the following instructions? sit $t2, $0. Sto bne $t2, $0. ELSE DONE ELSE: addi $t2, $t2. 2 DONE: 170 Chapter 2 Instructions: Language of the Computer 2.26 Consider the following MIPS loop: LOOP: slt $t2. $0, $t1 beg $t2. $0. DONE subi $t1,$t1. 1 addi $s2. $s2. 2 3 LOOP DONE: It 2.26.1 (5) Assume that the register St1 is initialized to the value 10. What is the value in register $s2 assuming $s2 is initially zero? 2.38 (5) Consider the following code: 1 bu $t0. 0($t1) sw $t0. 0($t2) Assume that the register $t1 contains the address 0x1000 0000 and the register $t2 contains the address 0x1000 0010. Note the MIPS architecture utilizes big-endian addressing. Assume that the data (in hexadecimal) at address 0x1000 0000 is: 0x11223344. What value is stored at the address pointed to by register St2? 2.39 (5] Write the MIPS assembly code that creates the 32-bit constant 0010 0000 0000 0001 0100 1001 0010 0100, and stores that value to register St1

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