27. Consider the circuit given in Fig 5.15. VWithout altering its combinational circuits, use the Hamming error detection scheme and add modules to the circuit so it would operate as a single-bit fault-tolerant FSM. CC3 Z (a Moore output) CC2 q0 CLR q1 - clock reset FIGURE 5.15 A Moore FSM to detect the overlapping sequence "101." 6.6 Show the register contents for multiplying 3-bit A_value 6 with 3-bit B_value 5 using the multicycle unsigned multiplier given in Fig. 6.15. B value A value P,n+1 bits B, n bits A, n bits b0 Pn-1.0 n-bit Adder Carry-in-o co (carry-out) Mod n+1 Counter sum FIGURE 6.15 A multicycle unsigned multiplier data path 27. Consider the circuit given in Fig 5.15. VWithout altering its combinational circuits, use the Hamming error detection scheme and add modules to the circuit so it would operate as a single-bit fault-tolerant FSM. CC3 Z (a Moore output) CC2 q0 CLR q1 - clock reset FIGURE 5.15 A Moore FSM to detect the overlapping sequence "101." 6.6 Show the register contents for multiplying 3-bit A_value 6 with 3-bit B_value 5 using the multicycle unsigned multiplier given in Fig. 6.15. B value A value P,n+1 bits B, n bits A, n bits b0 Pn-1.0 n-bit Adder Carry-in-o co (carry-out) Mod n+1 Counter sum FIGURE 6.15 A multicycle unsigned multiplier data path