$3.(10$ points$)$ Consider two different implementations of the same MIPS instruction set architecture. The instructions can be divided into three classes according to their CPI $($R$-$type, I$-$type, J$-$type$).$ P$1$ with a clock rate of $2\mathrm{.}8$ GHz and CPIs of $1,2,3$ ; and P$2$ with a clock rate of $3\mathrm{.}5$ GHz and CPIs of $2,3,$ and $1.$ Given a program with a dynamic instruction count of $3\mathrm{.}0$E$6$ instructions divided into classes as follows: $50\backslash \%$ R$-$type, $35\backslash \%$ I$-$type, $15\backslash \%$ J$-$type, which implementation is faster and by how much?

a$.$ What is the global CPI for each implementation?

b$.$ Find the clock cycles required in both cases.