Question: ( 3 ) [ 4 + 2 + 4 + 2 + 2 ] You are given the following code to analyze: 1 . int
You are given the following code to analyze:
int x;
int i sum ;
for i ; i ; i
sum xi xi;
Assume the code is executed under the following conditions:
sizeofint
Array x begins at mem. addr. x and is stored in rowmajor order.
Cache initially empty
Only mem. accesses are to elements of x Rest of the variables are in
registers.
a Case : Assume cache is bytes, directmapped, with byte blocks.
What is the miss rate? Explain.
b Case : What is the miss rate if the cache size is doubled becomes
bytes Explain.
c Case : If the cache were to be a byte, twoway setassociative cache
using an LRU replacement policy, with byte cache blocks. What is
the cache miss rate? Explain.
d For case will a larger cache size help reduce the miss rate? Why or
why not?
e For case will a larger block size help reduce the miss rate? Why or
why not?
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