Question: 3. A 1.12 GHz MIPS processor (with a 5-stage pipeline) executes program A at a rate of 900 million instructions per second. (a) What is

 3. A 1.12 GHz "MIPS" processor (with a 5-stage pipeline) executes

3. A 1.12 GHz "MIPS" processor (with a 5-stage pipeline) executes program A at a rate of 900 million instructions per second. (a) What is the CPI of the processor when executing this program? Do you expect the CPI to be different when executing other programs? (b) The program executes 2.5 billion instructions. Calculate the total execution time of the program (c) Program B executes on the same processor, has a CPI-1.33 and the following instruction mix and average number of clock cycles per instruction, for non-branch instructions: Instruction type ALU ops. Load Store 45% | 22% | 13% Frequency Clock cycle count 1.3 1.8 Calculate the percentage of executed branch instructions for program B and the average number of cycles for these branch instructions. (d) If an access to the data cache memory in this processor takes only 1 clock cycle, what is the probability that the instruction immediately following the Load instruction would need the data obtained from the memory by the Load

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