3. Consider the following code, which adds two array data and store the result to a memory location. add $t0, $s6, $s0 add $tl, $7, $sl 1 13 lw $t0, 4 ($t0) add $to, $t0, $s0 1 I5 Among the instructions in the above code, indicate the pairs of instructions that have read-after-write dependencies (i.e. I has dependency with 13 on St0) a. b. Consider that you want to execute the above code on a 5-stage pipelined datapath that doesn't have a data forwarding unit. Fill the following timing diagram. Note that the left- most column indicates the instruction ids which are marked besides the instructions in the code above (i.e. II is add S1O, Ss6, Ss0). If you need more (or fewer) clock cycles than provided columns, feel free to add (or delete) columns. cC1 CC2 CC3|CC4 CC5 CC6 CC7 CC8cC9 lcCi0 CC11 cC12 CC13 CC14 CC15 12 13 14 I5 16